Samsung and TSMC on Nvidia HBM: What Is Claimed and What Is Verified

On October 18, 2026, posts began circulating that Nvidia has mandated TSMC's 3nm process for the base dies of its custom NVHBM memory, and that Samsung has partnered with TSMC for the first time to supply it. The claim is that all three HBM makers, Samsung, SK hynix and Micron, would use the same TSMC base die, letting Nvidia shift orders between them.

Short answer: the direction is supported by reporting, but the specifics are not. We found reports that Micron, Samsung and SK hynix are all moving toward TSMC-made base dies. We did not find any statement from Nvidia, Samsung or TSMC confirming a 3nm mandate or a signed Samsung-TSMC deal.

Claimed versus verified

What NVHBM is and why the base die matters

High-bandwidth memory stacks several DRAM dies on top of a base die, a logic chip that talks to the GPU. In conventional HBM the base die is mostly an interface. Nvidia's NVHBM, announced in August according to TrendForce, moves the memory controller into the base die. That frees area on the GPU for compute and makes the base die more important and more customized.

That is why the choice of foundry matters. A bigger base-die role means a more advanced logic process, and the leading logic foundry is TSMC. Our earlier coverage of Samsung's HBM4 yield was about the DRAM side; this story is about the logic side beneath it.

What the reporting actually says, company by company

TrendForce's October 9 summary pulls together several outlets. Attribution matters, because none of these are company filings:

• Micron. Per The Elec, Micron's NVHBM (co-designed with Nvidia) and its JEDEC-standard HBM4E will use externally manufactured base dies, with TSMC expected to take that role. A Micron executive was quoted saying the HBM4E base die is on a foundry process. Micron's COO Manish Bhatia said NVHBM should carry higher prices and margins than standard HBM. The 3nm node, as one search summary noted, comes from The Elec rather than a Micron document.
• Samsung. Per ZDNet, Samsung is pursuing a dual-track model for custom HBM such as NVHBM: its core dies could pair with base dies from Samsung Foundry or from TSMC, depending on customer needs. For TSMC-made base dies, Samsung's memory business would handle design and optimization support. That is a flexible plan, not a confirmed contract.
• SK hynix. Per EDAILY, it already uses TSMC's 12nm process for its HBM4 base die, with TSMC's 3nm prioritized for HBM4E and future custom products. Per Newsis, it showed a custom HBM concept at GTC earlier this year. Reports on its node choices conflict in places: another Korean outlet said 12nm would serve mainstream server parts with 3nm for premium designs.
• TSMC. Emerging as the common base-die partner across the three, per the same summary. TSMC itself previously described custom HBM4E base dies on its N3P process, according to a TrendForce report from December 2025.

So the "all three on a TSMC 3nm base die" picture is plausible for the premium, custom tier, but the sources disagree on node and timing, and no one has called it a mandate.

A short history of the HBM base die

Early HBM generations used a base die made on the memory maker's own DRAM-style process, because its job was simple: route signals between the stack and the processor. As bandwidth demands grew, that changed. HBM4 moves toward a logic-process base die, which is why SK hynix turned to TSMC's 12nm process for it, per EDAILY. Custom HBM goes a step further by putting customer-specific logic, and in NVHBM's case the memory controller, into the same die.

This is the structural reason the foundry question suddenly matters to memory vendors who never needed leading-edge logic before. Samsung is unusual because it owns both a memory business and a foundry, so it can offer either route. Micron and SK hynix do not own a foundry, so an external partner is the natural choice. That asymmetry is why Samsung's dual-track plan is the interesting part of the reporting, and also why the word "partnership" in the headline needs care: pairing a customer-chosen TSMC base die with Samsung DRAM is a product configuration, not necessarily a corporate alliance.

Why a common base die would matter if it were true

The posts argue that standardizing the logic layer lets Nvidia shift orders between memory vendors. That is the logic behind the claim, and it is sensible as an inference: if the base die and controller are the same across suppliers, the differences move to the DRAM stack, and qualification of a second source gets easier. Nvidia's own incentives are well documented in our piece on vendor financing and Nvidia's central-bank-like role, where supply security and bargaining power repeat as themes.

But this is the posts' reasoning, not a finding from a filing. If Nvidia wanted vendor flexibility it could pursue it by design specification without naming a foundry, and no document we found says it did.

What it means for supply and prices

Three things to watch, none confirmed yet:

1. TSMC capacity. If more of the HBM stack needs TSMC logic wafers, memory makers compete with GPUs for the same foundry. Our AI chip supply chain roundup covered the packaging and interposer bottlenecks that already sit in that path.
2. Pricing. Micron's COO said NVHBM should carry higher prices and margins, per The Elec via TrendForce. Higher HBM prices flow into accelerator costs and, indirectly, into cloud rental. See the longer history in our memory price history post.
3. Geopolitical exposure. Concentrating logic dies at TSMC raises Taiwan risk for memory too, a theme in our post on Taiwan's president and Micron's Taichung HBM site.

What this means for people who build with AI

Most readers will never buy HBM directly. The practical consequences are indirect:

• GPU and rental pricing. Memory is a large share of accelerator cost. If custom HBM carries a premium, expect that in next-generation pricing, not this quarter's.
• Alternatives exist. Some designs avoid HBM entirely. Intel's inference GPU with large LPDDR5X memory, covered in our D270 post, is one example of trading bandwidth for capacity and cost.
• Software can reduce the load. Techniques such as KV-cache reduction lower HBM needs per token, as in our post on DeepSeek V4.1 Flash and HBM reduction.

How to check this yourself

• Look for an Nvidia newsroom post, GTC session or investor-call transcript that mentions NVHBM base-die requirements.
• Look for Samsung earnings-call language about foundry partners for custom HBM; Samsung reports and holds calls on a regular schedule.
• Look for TSMC statements about HBM base-die capacity, which would show up on its earnings calls.
• Compare the Korean-language originals (The Elec, ZDNet Korea, EDAILY, Newsis) with English summaries, since nodes and attributions drift in translation.
• Treat any post saying "first ever" with suspicion: SK hynix has worked with TSMC on HBM base dies for some time, per the reports above, so a Samsung-TSMC tie-up would not be the first TSMC base-die arrangement in the industry, even if it were the first for Samsung.

Bottom line

The verified part is modest but real: multiple outlets report that HBM makers are shifting base-die manufacturing to TSMC for Nvidia's custom NVHBM and HBM4E generation, and Samsung is keeping its own foundry as an alternative. The unverified part is the headline: a 3nm mandate and a signed rival deal. We will update this post when Nvidia, Samsung or TSMC says something on the record.

Related reading

• Samsung hits 80% HBM4 yield, four months early
• AI chip supply chain this week: TSMC record, Samsung phone cut, GlobalFoundries interposers
• Micron, Taiwan and the Taichung HBM site
• Memory prices: DRAM, HBM and NAND history
• Nvidia as the central bank of AI
• Intel D270: 480GB LPDDR5X inference GPU with no HBM
• DeepSeek V4.1 Flash and the KV-cache HBM reduction

Accurate as of October 18, 2026. The reports cited are from press and aggregators, not company filings.